Architect Labs' AI-designed chip is running on an FPGA; the 3.4× claim is a projection
On Moonshots, the panel played a launch video for Redwood, an accelerator that Palo Alto startup Architect Labs says its AI designed end to end from a specification written by two architects. The company's paper reports two weeks to verified design and FPGA deployment, with a small language model running in a third week — while the headline 3.4-times efficiency figure comes from a projected Samsung 8-nanometer chip that has not been built. The panel, who disclosed they are investors and an advisor, argued the real story is a "designless" company and recursive self-improvement at the chip layer.
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